2025-01-10T22:10:42,874 Created temporary directory: /tmp/pip-build-tracker-y15jm1kv 2025-01-10T22:10:42,875 Initialized build tracking at /tmp/pip-build-tracker-y15jm1kv 2025-01-10T22:10:42,876 Created build tracker: /tmp/pip-build-tracker-y15jm1kv 2025-01-10T22:10:42,876 Entered build tracker: /tmp/pip-build-tracker-y15jm1kv 2025-01-10T22:10:42,878 Created temporary directory: /tmp/pip-wheel-x7c9wg6s 2025-01-10T22:10:42,882 Created temporary directory: /tmp/pip-ephem-wheel-cache-y_opddwq 2025-01-10T22:10:42,928 Looking in indexes: https://pypi.org/simple, https://www.piwheels.org/simple 2025-01-10T22:10:42,931 2 location(s) to search for versions of pythondata-cpu-mor1kx: 2025-01-10T22:10:42,931 * https://pypi.org/simple/pythondata-cpu-mor1kx/ 2025-01-10T22:10:42,931 * https://www.piwheels.org/simple/pythondata-cpu-mor1kx/ 2025-01-10T22:10:42,932 Fetching project page and analyzing links: https://pypi.org/simple/pythondata-cpu-mor1kx/ 2025-01-10T22:10:42,933 Getting page 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2025-01-10T22:10:44,205 Added pythondata-cpu-mor1kx==5.2.post151 from https://files.pythonhosted.org/packages/34/54/4096b09abaa740e5f410c341006aec4771660ef56a33b5f0718aa41602df/pythondata_cpu_mor1kx-5.2.post151.tar.gz to build tracker '/tmp/pip-build-tracker-y15jm1kv' 2025-01-10T22:10:44,206 Running setup.py (path:/tmp/pip-wheel-x7c9wg6s/pythondata-cpu-mor1kx_093793af53b2404ca80e0b53e249a649/setup.py) egg_info for package pythondata-cpu-mor1kx 2025-01-10T22:10:44,207 Created temporary directory: /tmp/pip-pip-egg-info-mtiuan81 2025-01-10T22:10:44,208 Preparing metadata (setup.py): started 2025-01-10T22:10:44,209 Running command python setup.py egg_info 2025-01-10T22:10:45,295 running egg_info 2025-01-10T22:10:45,324 creating /tmp/pip-pip-egg-info-mtiuan81/pythondata_cpu_mor1kx.egg-info 2025-01-10T22:10:45,326 writing /tmp/pip-pip-egg-info-mtiuan81/pythondata_cpu_mor1kx.egg-info/PKG-INFO 2025-01-10T22:10:45,329 writing dependency_links to /tmp/pip-pip-egg-info-mtiuan81/pythondata_cpu_mor1kx.egg-info/dependency_links.txt 2025-01-10T22:10:45,331 writing top-level names to /tmp/pip-pip-egg-info-mtiuan81/pythondata_cpu_mor1kx.egg-info/top_level.txt 2025-01-10T22:10:45,333 writing manifest file '/tmp/pip-pip-egg-info-mtiuan81/pythondata_cpu_mor1kx.egg-info/SOURCES.txt' 2025-01-10T22:10:45,427 reading manifest file '/tmp/pip-pip-egg-info-mtiuan81/pythondata_cpu_mor1kx.egg-info/SOURCES.txt' 2025-01-10T22:10:45,429 reading manifest template 'MANIFEST.in' 2025-01-10T22:10:45,440 warning: no previously-included files matching '*.py[cod]' found anywhere in distribution 2025-01-10T22:10:45,440 adding license file 'LICENSE' 2025-01-10T22:10:45,446 writing manifest file '/tmp/pip-pip-egg-info-mtiuan81/pythondata_cpu_mor1kx.egg-info/SOURCES.txt' 2025-01-10T22:10:45,555 Preparing metadata (setup.py): finished with status 'done' 2025-01-10T22:10:45,559 Source in /tmp/pip-wheel-x7c9wg6s/pythondata-cpu-mor1kx_093793af53b2404ca80e0b53e249a649 has version 5.2.post151, which satisfies requirement pythondata-cpu-mor1kx==5.2.post151 from https://files.pythonhosted.org/packages/34/54/4096b09abaa740e5f410c341006aec4771660ef56a33b5f0718aa41602df/pythondata_cpu_mor1kx-5.2.post151.tar.gz 2025-01-10T22:10:45,561 Removed pythondata-cpu-mor1kx==5.2.post151 from https://files.pythonhosted.org/packages/34/54/4096b09abaa740e5f410c341006aec4771660ef56a33b5f0718aa41602df/pythondata_cpu_mor1kx-5.2.post151.tar.gz from build tracker '/tmp/pip-build-tracker-y15jm1kv' 2025-01-10T22:10:45,568 Created temporary directory: /tmp/pip-unpack-ml8_icrb 2025-01-10T22:10:45,569 Created temporary directory: /tmp/pip-unpack-11ersdgm 2025-01-10T22:10:45,569 Building wheels for collected packages: pythondata-cpu-mor1kx 2025-01-10T22:10:45,574 Created temporary directory: /tmp/pip-wheel-1ncj_75z 2025-01-10T22:10:45,574 Building wheel for pythondata-cpu-mor1kx (setup.py): started 2025-01-10T22:10:45,576 Destination directory: /tmp/pip-wheel-1ncj_75z 2025-01-10T22:10:45,576 Running command python setup.py bdist_wheel 2025-01-10T22:10:46,601 running bdist_wheel 2025-01-10T22:10:46,740 running build 2025-01-10T22:10:46,740 running build_py 2025-01-10T22:10:46,771 creating build/lib/pythondata_cpu_mor1kx 2025-01-10T22:10:46,773 copying pythondata_cpu_mor1kx/__init__.py -> build/lib/pythondata_cpu_mor1kx 2025-01-10T22:10:46,775 running egg_info 2025-01-10T22:10:46,803 writing pythondata_cpu_mor1kx.egg-info/PKG-INFO 2025-01-10T22:10:46,806 writing dependency_links to pythondata_cpu_mor1kx.egg-info/dependency_links.txt 2025-01-10T22:10:46,808 writing top-level names to pythondata_cpu_mor1kx.egg-info/top_level.txt 2025-01-10T22:10:46,839 reading manifest file 'pythondata_cpu_mor1kx.egg-info/SOURCES.txt' 2025-01-10T22:10:46,849 reading manifest template 'MANIFEST.in' 2025-01-10T22:10:46,857 warning: no previously-included files matching '*.py[cod]' found anywhere in distribution 2025-01-10T22:10:46,858 adding license file 'LICENSE' 2025-01-10T22:10:46,865 writing manifest file 'pythondata_cpu_mor1kx.egg-info/SOURCES.txt' 2025-01-10T22:10:46,867 /usr/local/lib/python3.11/dist-packages/setuptools/command/build_py.py:220: _Warning: Package 'pythondata_cpu_mor1kx.verilog' is absent from the `packages` configuration. 2025-01-10T22:10:46,868 !! 2025-01-10T22:10:46,869 ******************************************************************************** 2025-01-10T22:10:46,869 ############################ 2025-01-10T22:10:46,870 # Package would be ignored # 2025-01-10T22:10:46,870 ############################ 2025-01-10T22:10:46,871 Python recognizes 'pythondata_cpu_mor1kx.verilog' as an importable package[^1], 2025-01-10T22:10:46,871 but it is absent from setuptools' `packages` configuration. 2025-01-10T22:10:46,872 This leads to an ambiguous overall configuration. If you want to distribute this 2025-01-10T22:10:46,873 package, please make sure that 'pythondata_cpu_mor1kx.verilog' is explicitly added 2025-01-10T22:10:46,873 to the `packages` configuration field. 2025-01-10T22:10:46,874 Alternatively, you can also rely on setuptools' discovery methods 2025-01-10T22:10:46,875 (for example by using `find_namespace_packages(...)`/`find_namespace:` 2025-01-10T22:10:46,875 instead of `find_packages(...)`/`find:`). 2025-01-10T22:10:46,876 You can read more about "package discovery" on setuptools documentation page: 2025-01-10T22:10:46,877 - https://setuptools.pypa.io/en/latest/userguide/package_discovery.html 2025-01-10T22:10:46,878 If you don't want 'pythondata_cpu_mor1kx.verilog' to be distributed and are 2025-01-10T22:10:46,879 already explicitly excluding 'pythondata_cpu_mor1kx.verilog' via 2025-01-10T22:10:46,879 `find_namespace_packages(...)/find_namespace` or `find_packages(...)/find`, 2025-01-10T22:10:46,880 you can try to use `exclude_package_data`, or `include-package-data=False` in 2025-01-10T22:10:46,880 combination with a more fine grained `package-data` configuration. 2025-01-10T22:10:46,881 You can read more about "package data files" on setuptools documentation page: 2025-01-10T22:10:46,882 - https://setuptools.pypa.io/en/latest/userguide/datafiles.html 2025-01-10T22:10:46,884 [^1]: For Python, any directory (with suitable naming) can be imported, 2025-01-10T22:10:46,885 even if it does not contain any `.py` files. 2025-01-10T22:10:46,885 On the other hand, currently there is no concept of package data 2025-01-10T22:10:46,886 directory, all directories are treated like packages. 2025-01-10T22:10:46,886 ******************************************************************************** 2025-01-10T22:10:46,887 !! 2025-01-10T22:10:46,888 check.warn(importable) 2025-01-10T22:10:46,889 /usr/local/lib/python3.11/dist-packages/setuptools/command/build_py.py:220: _Warning: Package 'pythondata_cpu_mor1kx.verilog.bench.formal' is absent from the `packages` configuration. 2025-01-10T22:10:46,889 !! 2025-01-10T22:10:46,891 ******************************************************************************** 2025-01-10T22:10:46,891 ############################ 2025-01-10T22:10:46,892 # Package would be ignored # 2025-01-10T22:10:46,892 ############################ 2025-01-10T22:10:46,893 Python recognizes 'pythondata_cpu_mor1kx.verilog.bench.formal' as an importable package[^1], 2025-01-10T22:10:46,893 but it is absent from setuptools' `packages` configuration. 2025-01-10T22:10:46,894 This leads to an ambiguous overall configuration. If you want to distribute this 2025-01-10T22:10:46,895 package, please make sure that 'pythondata_cpu_mor1kx.verilog.bench.formal' is explicitly added 2025-01-10T22:10:46,895 to the `packages` configuration field. 2025-01-10T22:10:46,896 Alternatively, you can also rely on setuptools' discovery methods 2025-01-10T22:10:46,897 (for example by using `find_namespace_packages(...)`/`find_namespace:` 2025-01-10T22:10:46,897 instead of `find_packages(...)`/`find:`). 2025-01-10T22:10:46,898 You can read more about "package discovery" on setuptools documentation page: 2025-01-10T22:10:46,899 - https://setuptools.pypa.io/en/latest/userguide/package_discovery.html 2025-01-10T22:10:46,900 If you don't want 'pythondata_cpu_mor1kx.verilog.bench.formal' to be distributed and are 2025-01-10T22:10:46,901 already explicitly excluding 'pythondata_cpu_mor1kx.verilog.bench.formal' via 2025-01-10T22:10:46,901 `find_namespace_packages(...)/find_namespace` or `find_packages(...)/find`, 2025-01-10T22:10:46,902 you can try to use `exclude_package_data`, or `include-package-data=False` in 2025-01-10T22:10:46,902 combination with a more fine grained `package-data` configuration. 2025-01-10T22:10:46,903 You can read more about "package data files" on setuptools documentation page: 2025-01-10T22:10:46,904 - https://setuptools.pypa.io/en/latest/userguide/datafiles.html 2025-01-10T22:10:46,905 [^1]: For Python, any directory (with suitable naming) can be imported, 2025-01-10T22:10:46,906 even if it does not contain any `.py` files. 2025-01-10T22:10:46,906 On the other hand, currently there is no concept of package data 2025-01-10T22:10:46,907 directory, all directories are treated like packages. 2025-01-10T22:10:46,907 ******************************************************************************** 2025-01-10T22:10:46,908 !! 2025-01-10T22:10:46,909 check.warn(importable) 2025-01-10T22:10:46,909 /usr/local/lib/python3.11/dist-packages/setuptools/command/build_py.py:220: _Warning: Package 'pythondata_cpu_mor1kx.verilog.bench.verilog' is absent from the `packages` configuration. 2025-01-10T22:10:46,910 !! 2025-01-10T22:10:46,911 ******************************************************************************** 2025-01-10T22:10:46,911 ############################ 2025-01-10T22:10:46,912 # Package would be ignored # 2025-01-10T22:10:46,912 ############################ 2025-01-10T22:10:46,913 Python recognizes 'pythondata_cpu_mor1kx.verilog.bench.verilog' as an importable package[^1], 2025-01-10T22:10:46,913 but it is absent from setuptools' `packages` configuration. 2025-01-10T22:10:46,914 This leads to an ambiguous overall configuration. If you want to distribute this 2025-01-10T22:10:46,915 package, please make sure that 'pythondata_cpu_mor1kx.verilog.bench.verilog' is explicitly added 2025-01-10T22:10:46,915 to the `packages` configuration field. 2025-01-10T22:10:46,916 Alternatively, you can also rely on setuptools' discovery methods 2025-01-10T22:10:46,917 (for example by using `find_namespace_packages(...)`/`find_namespace:` 2025-01-10T22:10:46,917 instead of `find_packages(...)`/`find:`). 2025-01-10T22:10:46,918 You can read more about "package discovery" on setuptools documentation page: 2025-01-10T22:10:46,919 - https://setuptools.pypa.io/en/latest/userguide/package_discovery.html 2025-01-10T22:10:46,920 If you don't want 'pythondata_cpu_mor1kx.verilog.bench.verilog' to be distributed and are 2025-01-10T22:10:46,921 already explicitly excluding 'pythondata_cpu_mor1kx.verilog.bench.verilog' via 2025-01-10T22:10:46,921 `find_namespace_packages(...)/find_namespace` or `find_packages(...)/find`, 2025-01-10T22:10:46,922 you can try to use `exclude_package_data`, or `include-package-data=False` in 2025-01-10T22:10:46,922 combination with a more fine grained `package-data` configuration. 2025-01-10T22:10:46,923 You can read more about "package data files" on setuptools documentation page: 2025-01-10T22:10:46,924 - https://setuptools.pypa.io/en/latest/userguide/datafiles.html 2025-01-10T22:10:46,926 [^1]: For Python, any directory (with suitable naming) can be imported, 2025-01-10T22:10:46,927 even if it does not contain any `.py` files. 2025-01-10T22:10:46,927 On the other hand, currently there is no concept of package data 2025-01-10T22:10:46,928 directory, all directories are treated like packages. 2025-01-10T22:10:46,928 ******************************************************************************** 2025-01-10T22:10:46,929 !! 2025-01-10T22:10:46,930 check.warn(importable) 2025-01-10T22:10:46,930 /usr/local/lib/python3.11/dist-packages/setuptools/command/build_py.py:220: _Warning: Package 'pythondata_cpu_mor1kx.verilog.doc' is absent from the `packages` configuration. 2025-01-10T22:10:46,931 !! 2025-01-10T22:10:46,931 ******************************************************************************** 2025-01-10T22:10:46,932 ############################ 2025-01-10T22:10:46,933 # Package would be ignored # 2025-01-10T22:10:46,933 ############################ 2025-01-10T22:10:46,934 Python recognizes 'pythondata_cpu_mor1kx.verilog.doc' as an importable package[^1], 2025-01-10T22:10:46,934 but it is absent from setuptools' `packages` configuration. 2025-01-10T22:10:46,935 This leads to an ambiguous overall configuration. If you want to distribute this 2025-01-10T22:10:46,936 package, please make sure that 'pythondata_cpu_mor1kx.verilog.doc' is explicitly added 2025-01-10T22:10:46,936 to the `packages` configuration field. 2025-01-10T22:10:46,937 Alternatively, you can also rely on setuptools' discovery methods 2025-01-10T22:10:46,938 (for example by using `find_namespace_packages(...)`/`find_namespace:` 2025-01-10T22:10:46,938 instead of `find_packages(...)`/`find:`). 2025-01-10T22:10:46,939 You can read more about "package discovery" on setuptools documentation page: 2025-01-10T22:10:46,940 - https://setuptools.pypa.io/en/latest/userguide/package_discovery.html 2025-01-10T22:10:46,941 If you don't want 'pythondata_cpu_mor1kx.verilog.doc' to be distributed and are 2025-01-10T22:10:46,942 already explicitly excluding 'pythondata_cpu_mor1kx.verilog.doc' via 2025-01-10T22:10:46,942 `find_namespace_packages(...)/find_namespace` or `find_packages(...)/find`, 2025-01-10T22:10:46,943 you can try to use `exclude_package_data`, or `include-package-data=False` in 2025-01-10T22:10:46,943 combination with a more fine grained `package-data` configuration. 2025-01-10T22:10:46,945 You can read more about "package data files" on setuptools documentation page: 2025-01-10T22:10:46,946 - https://setuptools.pypa.io/en/latest/userguide/datafiles.html 2025-01-10T22:10:46,948 [^1]: For Python, any directory (with suitable naming) can be imported, 2025-01-10T22:10:46,948 even if it does not contain any `.py` files. 2025-01-10T22:10:46,949 On the other hand, currently there is no concept of package data 2025-01-10T22:10:46,949 directory, all directories are treated like packages. 2025-01-10T22:10:46,950 ******************************************************************************** 2025-01-10T22:10:46,951 !! 2025-01-10T22:10:46,951 check.warn(importable) 2025-01-10T22:10:46,952 /usr/local/lib/python3.11/dist-packages/setuptools/command/build_py.py:220: _Warning: Package 'pythondata_cpu_mor1kx.verilog.rtl.verilog' is absent from the `packages` configuration. 2025-01-10T22:10:46,952 !! 2025-01-10T22:10:46,953 ******************************************************************************** 2025-01-10T22:10:46,954 ############################ 2025-01-10T22:10:46,954 # Package would be ignored # 2025-01-10T22:10:46,954 ############################ 2025-01-10T22:10:46,955 Python recognizes 'pythondata_cpu_mor1kx.verilog.rtl.verilog' as an importable package[^1], 2025-01-10T22:10:46,955 but it is absent from setuptools' `packages` configuration. 2025-01-10T22:10:46,956 This leads to an ambiguous overall configuration. If you want to distribute this 2025-01-10T22:10:46,957 package, please make sure that 'pythondata_cpu_mor1kx.verilog.rtl.verilog' is explicitly added 2025-01-10T22:10:46,957 to the `packages` configuration field. 2025-01-10T22:10:46,958 Alternatively, you can also rely on setuptools' discovery methods 2025-01-10T22:10:46,958 (for example by using `find_namespace_packages(...)`/`find_namespace:` 2025-01-10T22:10:46,959 instead of `find_packages(...)`/`find:`). 2025-01-10T22:10:46,960 You can read more about "package discovery" on setuptools documentation page: 2025-01-10T22:10:46,961 - https://setuptools.pypa.io/en/latest/userguide/package_discovery.html 2025-01-10T22:10:46,962 If you don't want 'pythondata_cpu_mor1kx.verilog.rtl.verilog' to be distributed and are 2025-01-10T22:10:46,962 already explicitly excluding 'pythondata_cpu_mor1kx.verilog.rtl.verilog' via 2025-01-10T22:10:46,963 `find_namespace_packages(...)/find_namespace` or `find_packages(...)/find`, 2025-01-10T22:10:46,963 you can try to use `exclude_package_data`, or `include-package-data=False` in 2025-01-10T22:10:46,964 combination with a more fine grained `package-data` configuration. 2025-01-10T22:10:46,965 You can read more about "package data files" on setuptools documentation page: 2025-01-10T22:10:46,966 - https://setuptools.pypa.io/en/latest/userguide/datafiles.html 2025-01-10T22:10:46,967 [^1]: For Python, any directory (with suitable naming) can be imported, 2025-01-10T22:10:46,968 even if it does not contain any `.py` files. 2025-01-10T22:10:46,968 On the other hand, currently there is no concept of package data 2025-01-10T22:10:46,969 directory, all directories are treated like packages. 2025-01-10T22:10:46,969 ******************************************************************************** 2025-01-10T22:10:46,970 !! 2025-01-10T22:10:46,971 check.warn(importable) 2025-01-10T22:10:46,971 /usr/local/lib/python3.11/dist-packages/setuptools/command/build_py.py:220: _Warning: Package 'pythondata_cpu_mor1kx.verilog.rtl.verilog.pfpu32' is absent from the `packages` configuration. 2025-01-10T22:10:46,972 !! 2025-01-10T22:10:46,973 ******************************************************************************** 2025-01-10T22:10:46,974 ############################ 2025-01-10T22:10:46,974 # Package would be ignored # 2025-01-10T22:10:46,975 ############################ 2025-01-10T22:10:46,975 Python recognizes 'pythondata_cpu_mor1kx.verilog.rtl.verilog.pfpu32' as an importable package[^1], 2025-01-10T22:10:46,976 but it is absent from setuptools' `packages` configuration. 2025-01-10T22:10:46,977 This leads to an ambiguous overall configuration. If you want to distribute this 2025-01-10T22:10:46,977 package, please make sure that 'pythondata_cpu_mor1kx.verilog.rtl.verilog.pfpu32' is explicitly added 2025-01-10T22:10:46,978 to the `packages` configuration field. 2025-01-10T22:10:46,978 Alternatively, you can also rely on setuptools' discovery methods 2025-01-10T22:10:46,979 (for example by using `find_namespace_packages(...)`/`find_namespace:` 2025-01-10T22:10:46,979 instead of `find_packages(...)`/`find:`). 2025-01-10T22:10:46,980 You can read more about "package discovery" on setuptools documentation page: 2025-01-10T22:10:46,982 - https://setuptools.pypa.io/en/latest/userguide/package_discovery.html 2025-01-10T22:10:46,983 If you don't want 'pythondata_cpu_mor1kx.verilog.rtl.verilog.pfpu32' to be distributed and are 2025-01-10T22:10:46,983 already explicitly excluding 'pythondata_cpu_mor1kx.verilog.rtl.verilog.pfpu32' via 2025-01-10T22:10:46,984 `find_namespace_packages(...)/find_namespace` or `find_packages(...)/find`, 2025-01-10T22:10:46,984 you can try to use `exclude_package_data`, or `include-package-data=False` in 2025-01-10T22:10:46,985 combination with a more fine grained `package-data` configuration. 2025-01-10T22:10:46,986 You can read more about "package data files" on setuptools documentation page: 2025-01-10T22:10:46,987 - https://setuptools.pypa.io/en/latest/userguide/datafiles.html 2025-01-10T22:10:46,988 [^1]: For Python, any directory (with suitable naming) can be imported, 2025-01-10T22:10:46,989 even if it does not contain any `.py` files. 2025-01-10T22:10:46,989 On the other hand, currently there is no concept of package data 2025-01-10T22:10:46,990 directory, all directories are treated like packages. 2025-01-10T22:10:46,990 ******************************************************************************** 2025-01-10T22:10:46,991 !! 2025-01-10T22:10:46,992 check.warn(importable) 2025-01-10T22:10:46,992 creating build/lib/pythondata_cpu_mor1kx/verilog 2025-01-10T22:10:46,993 copying pythondata_cpu_mor1kx/verilog/.gitignore -> build/lib/pythondata_cpu_mor1kx/verilog 2025-01-10T22:10:46,993 copying pythondata_cpu_mor1kx/verilog/Jenkinsfile -> build/lib/pythondata_cpu_mor1kx/verilog 2025-01-10T22:10:46,994 copying pythondata_cpu_mor1kx/verilog/LICENSE -> build/lib/pythondata_cpu_mor1kx/verilog 2025-01-10T22:10:46,994 copying pythondata_cpu_mor1kx/verilog/README.md -> build/lib/pythondata_cpu_mor1kx/verilog 2025-01-10T22:10:46,995 copying pythondata_cpu_mor1kx/verilog/mor1kx.core -> build/lib/pythondata_cpu_mor1kx/verilog 2025-01-10T22:10:46,995 creating build/lib/pythondata_cpu_mor1kx/verilog/.github/workflows 2025-01-10T22:10:46,996 copying pythondata_cpu_mor1kx/verilog/.github/workflows/Dockerfile -> build/lib/pythondata_cpu_mor1kx/verilog/.github/workflows 2025-01-10T22:10:46,996 copying pythondata_cpu_mor1kx/verilog/.github/workflows/ci.yml -> build/lib/pythondata_cpu_mor1kx/verilog/.github/workflows 2025-01-10T22:10:46,997 creating build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:46,997 copying pythondata_cpu_mor1kx/verilog/bench/formal/.gitignore -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:46,998 copying pythondata_cpu_mor1kx/verilog/bench/formal/Makefile -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:46,998 copying pythondata_cpu_mor1kx/verilog/bench/formal/f_multiclock_op.v -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:46,999 copying pythondata_cpu_mor1kx/verilog/bench/formal/fspr_master.v -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:46,999 copying pythondata_cpu_mor1kx/verilog/bench/formal/fspr_slave.v -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,000 copying pythondata_cpu_mor1kx/verilog/bench/formal/fwb_master.v -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,000 copying pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx.gtkw -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,001 copying pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx.sby -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,001 copying pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_bus_if_wb32.sby -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,002 copying pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_cache_lru.sby -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,002 copying pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_cpu_cappuccino.gtkw -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,002 copying pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_cpu_cappuccino.sby -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,003 copying pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_ctrl_cappuccino.sby -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,003 copying pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_dcache.gtkw -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,004 copying pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_dcache.sby -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,004 copying pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_decode.sby -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,005 copying pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_decode_execute_cappuccino.sby -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,005 copying pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_dmmu.gtkw -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,006 copying pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_dmmu.sby -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,006 copying pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_execute_alu.sby -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,007 copying pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_execute_ctrl_cappuccino.sby -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,007 copying pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_fetch_cappuccino.sby -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,008 copying pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_icache.sby -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,008 copying pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_immu.sby -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,009 copying pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_lsu_cappuccino.gtkw -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,009 copying pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_lsu_cappuccino.sby -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,010 copying pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_pcu.sby -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,010 copying pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_pic.sby -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,011 copying pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_rf_cappuccino.sby -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,011 copying pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_simple_dpram_sclk.gtkw -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,012 copying pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_simple_dpram_sclk.sby -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,012 copying pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_store_buffer.gtkw -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,013 copying pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_store_buffer.sby -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,014 copying pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_ticktimer.sby -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,014 copying pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_true_dpram_sclk.gtkw -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,015 copying pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_true_dpram_sclk.sby -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,015 copying pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_wb_mux_cappuccino.sby -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,015 copying pythondata_cpu_mor1kx/verilog/bench/formal/states-dcache.txt -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,016 copying pythondata_cpu_mor1kx/verilog/bench/formal/states-lsu.txt -> build/lib/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,017 creating build/lib/pythondata_cpu_mor1kx/verilog/bench/verilog 2025-01-10T22:10:47,017 copying pythondata_cpu_mor1kx/verilog/bench/verilog/mor1kx_monitor.v -> build/lib/pythondata_cpu_mor1kx/verilog/bench/verilog 2025-01-10T22:10:47,019 copying pythondata_cpu_mor1kx/verilog/bench/verilog/mor1kx_traceport_monitor.v -> build/lib/pythondata_cpu_mor1kx/verilog/bench/verilog 2025-01-10T22:10:47,022 creating build/lib/pythondata_cpu_mor1kx/verilog/doc 2025-01-10T22:10:47,023 copying pythondata_cpu_mor1kx/verilog/doc/Makefile -> build/lib/pythondata_cpu_mor1kx/verilog/doc 2025-01-10T22:10:47,026 copying pythondata_cpu_mor1kx/verilog/doc/docbook-xsl.css -> build/lib/pythondata_cpu_mor1kx/verilog/doc 2025-01-10T22:10:47,028 copying pythondata_cpu_mor1kx/verilog/doc/docbook.xsl -> build/lib/pythondata_cpu_mor1kx/verilog/doc 2025-01-10T22:10:47,031 copying pythondata_cpu_mor1kx/verilog/doc/gen-docinfo.pl -> build/lib/pythondata_cpu_mor1kx/verilog/doc 2025-01-10T22:10:47,033 copying pythondata_cpu_mor1kx/verilog/doc/mor1kx.asciidoc -> build/lib/pythondata_cpu_mor1kx/verilog/doc 2025-01-10T22:10:47,036 creating build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,038 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx-defines.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,041 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx-sprs.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,044 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,047 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_branch_prediction.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,050 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_branch_predictor_gshare.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,052 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_branch_predictor_saturation_counter.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,054 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_branch_predictor_simple.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,057 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_bus_if_wb32.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,059 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_cache_lru.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,062 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_cfgrs.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,065 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_cpu.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,068 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_cpu_cappuccino.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,072 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_cpu_espresso.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,076 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_cpu_prontoespresso.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,079 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_ctrl_cappuccino.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,082 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_ctrl_espresso.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,086 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_ctrl_prontoespresso.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,089 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_dcache.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,092 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_decode.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,095 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_decode_execute_cappuccino.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,098 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_dmmu.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,102 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_execute_alu.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,105 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_execute_ctrl_cappuccino.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,108 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_fetch_cappuccino.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,112 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_fetch_espresso.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,114 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_fetch_prontoespresso.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,117 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_fetch_tcm_prontoespresso.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,120 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_icache.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,123 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_immu.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,126 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_lsu_cappuccino.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,130 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_lsu_espresso.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,132 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_pcu.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,135 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_pic.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,137 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_rf_cappuccino.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,140 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_rf_espresso.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,143 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_simple_dpram_sclk.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,146 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_store_buffer.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,148 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_ticktimer.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,151 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_true_dpram_sclk.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,154 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_utils.vh -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,156 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_wb_mux_cappuccino.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,158 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_wb_mux_espresso.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,160 creating build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/pfpu32 2025-01-10T22:10:47,162 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/pfpu32/pfpu32_addsub.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/pfpu32 2025-01-10T22:10:47,164 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/pfpu32/pfpu32_cmp.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/pfpu32 2025-01-10T22:10:47,168 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/pfpu32/pfpu32_f2i.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/pfpu32 2025-01-10T22:10:47,171 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/pfpu32/pfpu32_i2f.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/pfpu32 2025-01-10T22:10:47,173 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/pfpu32/pfpu32_muldiv.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/pfpu32 2025-01-10T22:10:47,176 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/pfpu32/pfpu32_rnd.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/pfpu32 2025-01-10T22:10:47,180 copying pythondata_cpu_mor1kx/verilog/rtl/verilog/pfpu32/pfpu32_top.v -> build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/pfpu32 2025-01-10T22:10:47,210 /usr/local/lib/python3.11/dist-packages/setuptools/_distutils/cmd.py:66: SetuptoolsDeprecationWarning: setup.py install is deprecated. 2025-01-10T22:10:47,211 !! 2025-01-10T22:10:47,212 ******************************************************************************** 2025-01-10T22:10:47,212 Please avoid running ``setup.py`` directly. 2025-01-10T22:10:47,213 Instead, use pypa/build, pypa/installer or other 2025-01-10T22:10:47,213 standards-based tools. 2025-01-10T22:10:47,214 See https://blog.ganssle.io/articles/2021/10/setup-py-deprecated.html for details. 2025-01-10T22:10:47,215 ******************************************************************************** 2025-01-10T22:10:47,216 !! 2025-01-10T22:10:47,217 self.initialize_options() 2025-01-10T22:10:47,240 installing to build/bdist.linux-armv7l/wheel 2025-01-10T22:10:47,241 running install 2025-01-10T22:10:47,266 running install_lib 2025-01-10T22:10:47,295 creating build/bdist.linux-armv7l/wheel 2025-01-10T22:10:47,297 creating build/bdist.linux-armv7l/wheel/pythondata_cpu_mor1kx 2025-01-10T22:10:47,299 creating build/bdist.linux-armv7l/wheel/pythondata_cpu_mor1kx/verilog 2025-01-10T22:10:47,301 creating build/bdist.linux-armv7l/wheel/pythondata_cpu_mor1kx/verilog/bench 2025-01-10T22:10:47,303 creating build/bdist.linux-armv7l/wheel/pythondata_cpu_mor1kx/verilog/bench/verilog 2025-01-10T22:10:47,304 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/verilog/mor1kx_monitor.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/verilog 2025-01-10T22:10:47,307 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/verilog/mor1kx_traceport_monitor.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/verilog 2025-01-10T22:10:47,310 creating build/bdist.linux-armv7l/wheel/pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,312 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_wb_mux_cappuccino.sby -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,314 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_bus_if_wb32.sby -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,317 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_simple_dpram_sclk.gtkw -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,319 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_store_buffer.sby -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,322 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_execute_ctrl_cappuccino.sby -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,324 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_fetch_cappuccino.sby -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,327 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_cpu_cappuccino.gtkw -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,329 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/fspr_master.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,331 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_lsu_cappuccino.gtkw -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,334 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_cpu_cappuccino.sby -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,335 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx.sby -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,337 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_rf_cappuccino.sby -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,339 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_decode_execute_cappuccino.sby -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,341 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_dcache.gtkw -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,343 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/.gitignore -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,345 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_true_dpram_sclk.gtkw -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,347 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_ctrl_cappuccino.sby -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,349 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/fspr_slave.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,351 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/states-dcache.txt -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,353 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_ticktimer.sby -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,354 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_dcache.sby -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,356 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_store_buffer.gtkw -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,358 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_pcu.sby -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,360 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_immu.sby -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,362 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_true_dpram_sclk.sby -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,364 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_dmmu.gtkw -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,365 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/Makefile -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,367 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/fwb_master.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,370 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx.gtkw -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,371 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_execute_alu.sby -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,373 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_cache_lru.sby -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,375 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_pic.sby -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,377 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_decode.sby -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,379 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_simple_dpram_sclk.sby -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,381 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/states-lsu.txt -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,382 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_dmmu.sby -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,384 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_icache.sby -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,386 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_lsu_cappuccino.sby -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,388 copying build/lib/pythondata_cpu_mor1kx/verilog/bench/formal/f_multiclock_op.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/bench/formal 2025-01-10T22:10:47,389 copying build/lib/pythondata_cpu_mor1kx/verilog/.gitignore -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog 2025-01-10T22:10:47,391 copying build/lib/pythondata_cpu_mor1kx/verilog/README.md -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog 2025-01-10T22:10:47,394 copying build/lib/pythondata_cpu_mor1kx/verilog/Jenkinsfile -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog 2025-01-10T22:10:47,396 creating build/bdist.linux-armv7l/wheel/pythondata_cpu_mor1kx/verilog/.github 2025-01-10T22:10:47,398 creating build/bdist.linux-armv7l/wheel/pythondata_cpu_mor1kx/verilog/.github/workflows 2025-01-10T22:10:47,400 copying build/lib/pythondata_cpu_mor1kx/verilog/.github/workflows/ci.yml -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/.github/workflows 2025-01-10T22:10:47,403 copying build/lib/pythondata_cpu_mor1kx/verilog/.github/workflows/Dockerfile -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/.github/workflows 2025-01-10T22:10:47,406 creating build/bdist.linux-armv7l/wheel/pythondata_cpu_mor1kx/verilog/doc 2025-01-10T22:10:47,407 copying build/lib/pythondata_cpu_mor1kx/verilog/doc/gen-docinfo.pl -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/doc 2025-01-10T22:10:47,409 copying build/lib/pythondata_cpu_mor1kx/verilog/doc/docbook-xsl.css -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/doc 2025-01-10T22:10:47,412 copying build/lib/pythondata_cpu_mor1kx/verilog/doc/Makefile -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/doc 2025-01-10T22:10:47,413 copying build/lib/pythondata_cpu_mor1kx/verilog/doc/mor1kx.asciidoc -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/doc 2025-01-10T22:10:47,416 copying build/lib/pythondata_cpu_mor1kx/verilog/doc/docbook.xsl -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/doc 2025-01-10T22:10:47,418 copying build/lib/pythondata_cpu_mor1kx/verilog/mor1kx.core -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog 2025-01-10T22:10:47,420 copying build/lib/pythondata_cpu_mor1kx/verilog/LICENSE -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog 2025-01-10T22:10:47,423 creating build/bdist.linux-armv7l/wheel/pythondata_cpu_mor1kx/verilog/rtl 2025-01-10T22:10:47,426 creating build/bdist.linux-armv7l/wheel/pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,427 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_cpu_prontoespresso.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,431 creating build/bdist.linux-armv7l/wheel/pythondata_cpu_mor1kx/verilog/rtl/verilog/pfpu32 2025-01-10T22:10:47,432 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/pfpu32/pfpu32_f2i.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog/pfpu32 2025-01-10T22:10:47,434 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/pfpu32/pfpu32_top.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog/pfpu32 2025-01-10T22:10:47,437 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/pfpu32/pfpu32_muldiv.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog/pfpu32 2025-01-10T22:10:47,439 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/pfpu32/pfpu32_rnd.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog/pfpu32 2025-01-10T22:10:47,442 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/pfpu32/pfpu32_i2f.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog/pfpu32 2025-01-10T22:10:47,444 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/pfpu32/pfpu32_cmp.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog/pfpu32 2025-01-10T22:10:47,447 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/pfpu32/pfpu32_addsub.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog/pfpu32 2025-01-10T22:10:47,452 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_fetch_prontoespresso.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,455 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_simple_dpram_sclk.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,457 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_branch_predictor_saturation_counter.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,459 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_lsu_cappuccino.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,462 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_execute_ctrl_cappuccino.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,465 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_rf_espresso.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,467 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_ctrl_prontoespresso.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,471 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_decode.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,473 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx-sprs.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,476 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_wb_mux_espresso.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,478 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_fetch_cappuccino.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,482 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_immu.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,484 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_dcache.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,487 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_branch_predictor_simple.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,490 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_lsu_espresso.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,492 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_icache.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,496 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_cpu_cappuccino.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,502 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_store_buffer.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,504 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,506 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_ticktimer.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,509 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_dmmu.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,511 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_utils.vh -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,514 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_ctrl_espresso.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,517 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_fetch_espresso.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,519 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_decode_execute_cappuccino.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,522 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_true_dpram_sclk.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,524 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_execute_alu.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,527 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_ctrl_cappuccino.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,531 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx-defines.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,533 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_branch_predictor_gshare.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,536 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_pic.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,538 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_cache_lru.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,540 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_fetch_tcm_prontoespresso.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,543 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_bus_if_wb32.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,545 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_rf_cappuccino.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,548 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_branch_prediction.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,551 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_pcu.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,554 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_cfgrs.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,557 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_wb_mux_cappuccino.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,559 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_cpu_espresso.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,562 copying build/lib/pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_cpu.v -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx/verilog/rtl/verilog 2025-01-10T22:10:47,564 copying build/lib/pythondata_cpu_mor1kx/__init__.py -> build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx 2025-01-10T22:10:47,566 running install_egg_info 2025-01-10T22:10:47,599 Copying pythondata_cpu_mor1kx.egg-info to build/bdist.linux-armv7l/wheel/./pythondata_cpu_mor1kx-5.2.post151-py3.11.egg-info 2025-01-10T22:10:47,609 running install_scripts 2025-01-10T22:10:47,622 creating build/bdist.linux-armv7l/wheel/pythondata_cpu_mor1kx-5.2.post151.dist-info/WHEEL 2025-01-10T22:10:47,624 creating '/tmp/pip-wheel-1ncj_75z/pythondata_cpu_mor1kx-5.2.post151-py3-none-any.whl' and adding 'build/bdist.linux-armv7l/wheel' to it 2025-01-10T22:10:47,627 adding 'pythondata_cpu_mor1kx/__init__.py' 2025-01-10T22:10:47,629 adding 'pythondata_cpu_mor1kx/verilog/.gitignore' 2025-01-10T22:10:47,630 adding 'pythondata_cpu_mor1kx/verilog/Jenkinsfile' 2025-01-10T22:10:47,633 adding 'pythondata_cpu_mor1kx/verilog/LICENSE' 2025-01-10T22:10:47,635 adding 'pythondata_cpu_mor1kx/verilog/README.md' 2025-01-10T22:10:47,636 adding 'pythondata_cpu_mor1kx/verilog/mor1kx.core' 2025-01-10T22:10:47,639 adding 'pythondata_cpu_mor1kx/verilog/.github/workflows/Dockerfile' 2025-01-10T22:10:47,640 adding 'pythondata_cpu_mor1kx/verilog/.github/workflows/ci.yml' 2025-01-10T22:10:47,643 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/.gitignore' 2025-01-10T22:10:47,644 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/Makefile' 2025-01-10T22:10:47,646 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/f_multiclock_op.v' 2025-01-10T22:10:47,647 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/fspr_master.v' 2025-01-10T22:10:47,648 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/fspr_slave.v' 2025-01-10T22:10:47,650 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/fwb_master.v' 2025-01-10T22:10:47,651 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx.gtkw' 2025-01-10T22:10:47,653 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx.sby' 2025-01-10T22:10:47,654 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_bus_if_wb32.sby' 2025-01-10T22:10:47,655 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_cache_lru.sby' 2025-01-10T22:10:47,656 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_cpu_cappuccino.gtkw' 2025-01-10T22:10:47,658 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_cpu_cappuccino.sby' 2025-01-10T22:10:47,659 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_ctrl_cappuccino.sby' 2025-01-10T22:10:47,660 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_dcache.gtkw' 2025-01-10T22:10:47,661 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_dcache.sby' 2025-01-10T22:10:47,662 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_decode.sby' 2025-01-10T22:10:47,664 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_decode_execute_cappuccino.sby' 2025-01-10T22:10:47,665 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_dmmu.gtkw' 2025-01-10T22:10:47,666 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_dmmu.sby' 2025-01-10T22:10:47,667 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_execute_alu.sby' 2025-01-10T22:10:47,668 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_execute_ctrl_cappuccino.sby' 2025-01-10T22:10:47,669 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_fetch_cappuccino.sby' 2025-01-10T22:10:47,671 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_icache.sby' 2025-01-10T22:10:47,672 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_immu.sby' 2025-01-10T22:10:47,673 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_lsu_cappuccino.gtkw' 2025-01-10T22:10:47,675 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_lsu_cappuccino.sby' 2025-01-10T22:10:47,676 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_pcu.sby' 2025-01-10T22:10:47,677 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_pic.sby' 2025-01-10T22:10:47,679 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_rf_cappuccino.sby' 2025-01-10T22:10:47,680 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_simple_dpram_sclk.gtkw' 2025-01-10T22:10:47,681 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_simple_dpram_sclk.sby' 2025-01-10T22:10:47,682 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_store_buffer.gtkw' 2025-01-10T22:10:47,684 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_store_buffer.sby' 2025-01-10T22:10:47,685 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_ticktimer.sby' 2025-01-10T22:10:47,686 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_true_dpram_sclk.gtkw' 2025-01-10T22:10:47,687 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_true_dpram_sclk.sby' 2025-01-10T22:10:47,688 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/mor1kx_wb_mux_cappuccino.sby' 2025-01-10T22:10:47,689 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/states-dcache.txt' 2025-01-10T22:10:47,690 adding 'pythondata_cpu_mor1kx/verilog/bench/formal/states-lsu.txt' 2025-01-10T22:10:47,694 adding 'pythondata_cpu_mor1kx/verilog/bench/verilog/mor1kx_monitor.v' 2025-01-10T22:10:47,696 adding 'pythondata_cpu_mor1kx/verilog/bench/verilog/mor1kx_traceport_monitor.v' 2025-01-10T22:10:47,698 adding 'pythondata_cpu_mor1kx/verilog/doc/Makefile' 2025-01-10T22:10:47,699 adding 'pythondata_cpu_mor1kx/verilog/doc/docbook-xsl.css' 2025-01-10T22:10:47,701 adding 'pythondata_cpu_mor1kx/verilog/doc/docbook.xsl' 2025-01-10T22:10:47,702 adding 'pythondata_cpu_mor1kx/verilog/doc/gen-docinfo.pl' 2025-01-10T22:10:47,704 adding 'pythondata_cpu_mor1kx/verilog/doc/mor1kx.asciidoc' 2025-01-10T22:10:47,708 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx-defines.v' 2025-01-10T22:10:47,710 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx-sprs.v' 2025-01-10T22:10:47,712 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx.v' 2025-01-10T22:10:47,714 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_branch_prediction.v' 2025-01-10T22:10:47,715 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_branch_predictor_gshare.v' 2025-01-10T22:10:47,716 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_branch_predictor_saturation_counter.v' 2025-01-10T22:10:47,718 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_branch_predictor_simple.v' 2025-01-10T22:10:47,719 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_bus_if_wb32.v' 2025-01-10T22:10:47,721 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_cache_lru.v' 2025-01-10T22:10:47,723 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_cfgrs.v' 2025-01-10T22:10:47,725 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_cpu.v' 2025-01-10T22:10:47,733 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_cpu_cappuccino.v' 2025-01-10T22:10:47,736 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_cpu_espresso.v' 2025-01-10T22:10:47,740 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_cpu_prontoespresso.v' 2025-01-10T22:10:47,746 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_ctrl_cappuccino.v' 2025-01-10T22:10:47,751 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_ctrl_espresso.v' 2025-01-10T22:10:47,757 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_ctrl_prontoespresso.v' 2025-01-10T22:10:47,761 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_dcache.v' 2025-01-10T22:10:47,763 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_decode.v' 2025-01-10T22:10:47,766 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_decode_execute_cappuccino.v' 2025-01-10T22:10:47,769 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_dmmu.v' 2025-01-10T22:10:47,773 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_execute_alu.v' 2025-01-10T22:10:47,776 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_execute_ctrl_cappuccino.v' 2025-01-10T22:10:47,779 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_fetch_cappuccino.v' 2025-01-10T22:10:47,781 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_fetch_espresso.v' 2025-01-10T22:10:47,784 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_fetch_prontoespresso.v' 2025-01-10T22:10:47,786 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_fetch_tcm_prontoespresso.v' 2025-01-10T22:10:47,789 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_icache.v' 2025-01-10T22:10:47,792 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_immu.v' 2025-01-10T22:10:47,797 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_lsu_cappuccino.v' 2025-01-10T22:10:47,798 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_lsu_espresso.v' 2025-01-10T22:10:47,800 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_pcu.v' 2025-01-10T22:10:47,802 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_pic.v' 2025-01-10T22:10:47,804 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_rf_cappuccino.v' 2025-01-10T22:10:47,806 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_rf_espresso.v' 2025-01-10T22:10:47,807 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_simple_dpram_sclk.v' 2025-01-10T22:10:47,808 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_store_buffer.v' 2025-01-10T22:10:47,810 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_ticktimer.v' 2025-01-10T22:10:47,811 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_true_dpram_sclk.v' 2025-01-10T22:10:47,812 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_utils.vh' 2025-01-10T22:10:47,814 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_wb_mux_cappuccino.v' 2025-01-10T22:10:47,815 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/mor1kx_wb_mux_espresso.v' 2025-01-10T22:10:47,818 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/pfpu32/pfpu32_addsub.v' 2025-01-10T22:10:47,819 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/pfpu32/pfpu32_cmp.v' 2025-01-10T22:10:47,821 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/pfpu32/pfpu32_f2i.v' 2025-01-10T22:10:47,822 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/pfpu32/pfpu32_i2f.v' 2025-01-10T22:10:47,825 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/pfpu32/pfpu32_muldiv.v' 2025-01-10T22:10:47,828 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/pfpu32/pfpu32_rnd.v' 2025-01-10T22:10:47,831 adding 'pythondata_cpu_mor1kx/verilog/rtl/verilog/pfpu32/pfpu32_top.v' 2025-01-10T22:10:47,834 adding 'pythondata_cpu_mor1kx-5.2.post151.dist-info/LICENSE' 2025-01-10T22:10:47,835 adding 'pythondata_cpu_mor1kx-5.2.post151.dist-info/METADATA' 2025-01-10T22:10:47,836 adding 'pythondata_cpu_mor1kx-5.2.post151.dist-info/WHEEL' 2025-01-10T22:10:47,837 adding 'pythondata_cpu_mor1kx-5.2.post151.dist-info/top_level.txt' 2025-01-10T22:10:47,839 adding 'pythondata_cpu_mor1kx-5.2.post151.dist-info/RECORD' 2025-01-10T22:10:47,845 removing build/bdist.linux-armv7l/wheel 2025-01-10T22:10:47,998 Building wheel for pythondata-cpu-mor1kx (setup.py): finished with status 'done' 2025-01-10T22:10:48,006 Created wheel for pythondata-cpu-mor1kx: filename=pythondata_cpu_mor1kx-5.2.post151-py3-none-any.whl size=266479 sha256=d919364325d61eed06e8f9c6b7de6c3946a6d41bb2ddfcb2892dbc6e09c13135 2025-01-10T22:10:48,008 Stored in directory: /tmp/pip-ephem-wheel-cache-y_opddwq/wheels/82/70/98/dbf300b7dc6a491d2d3d3984aaa5ef4f80d45d130da3e25383 2025-01-10T22:10:48,024 Successfully built pythondata-cpu-mor1kx 2025-01-10T22:10:48,034 Removed build tracker: '/tmp/pip-build-tracker-y15jm1kv'